Peter Milder (CMU) - Computer Generation of Hardware for Digital Signal Processing Transforms

Talk by Peter Mildes, Carnegie Mellon University : Computer Generation of Hardware for Digital Signal Processing Transforms

Abstract:

Linear transforms (such as the discrete Fourier transform) are ubiquitous in digital signal processing (DSP), scientific computing, and communication applications. Algorithms for computing linear transforms are often highly structured and regular, which makes them well suited for hardware implementation. This regularity leads to a large amount of freedom in the way an algorithm is mapped to a datapath. Coupled with the large number of algorithmic options available, this means that it is extremely difficult for a designer to explore the combined algorithm/datapath design space by hand. In this talk, I present the Spiral hardware generation framework, a high-level synthesis tool for compiling and optimizing customized hardware implementations of linear transforms. The system uses a mathematical language to specify transform algorithms and associated sequentially-reused hardware structures. It enables automatic generation over a wide range of cost/performance tradeoff options, while producing designs of quality comparable to those designed by hand.

Bio:

Peter Milder is a post-doctoral researcher in the department of Electrical and Computer Engineering at Carnegie Mellon University. His research interests include high-level design tools, hardware for signal processing and communications, computer architecture, and design for FPGA and ASIC. Peter received his PhD, MS, and BS degrees from Carnegie Mellon in 2010, 2005, and 2004, respectively.