CAB E 72
Speaker: Rakesh Kumar
Title: Tailoring Server Architectures to Application Demands
The computing landscape is shifting from the traditional desktop computing to mobile-cloud computing model. In this new model, datacenters have emerged as the workhorses that do all the heavy-duty computations and serve as the backbone of mobile services. Datacenter applications are characterize by massive instruction footprints and typically operate on mutli tera/peta-byte datasets. Due to these huge instruction footprints and datasets, server processors spend significant amount of time waiting for instructions and data to arrive from cache/memory hierarchy. In this talk, I will present a storage-free instruction delivery mechanism and incorporation of 3D-stacked DRAM caches to tackle the problems of efficient instruction and data delivery in server applications.
Rakesh Kumar is a post-doctoral Research Associate in the School of Informatics at University of Edinburgh. His work focuses on scale-out servers, hardware/software co-designed processors, memory system, and run-time code generation and optimizations. He received his PhD from UPC Barcelona in 2014. During his internship at Intel Barcelona Research Center he developed memory controllers for Intel Skylake server architecture.