The paper “Lowering the Latency of Data Processing Pipelines Through FPGA based Hardware Acceleration" by Muhsen Owaida in cooperation with Amadeus has been accepted to VLDB 2020

The paper “Lowering the Latency of Data Processing Pipelines Through FPGA based Hardware Acceleration" authored by Muhsen Owaida, Gustavo Alonso, Laura Fogliarini, Anthony Hock-Koon, and Pierre-Etienne Melet describing the joint project between the Systems Group and Amadeus to use FPGAs to accelerate inference over decision tree ensembles has been accepted to VLDB 2020.