FPGA

FPGAs in the Datacenter

The limitations of today's computing architectures are well known: high power consumption, heat dissipation, network and I/O bottlenecks, and the memory wall. Field-programmable gate arrays (FPGAs), user-configurable hardware chips, are promising candidates to overcome these limitations. With tailor-made and software-configured hardware circuits it is possible to process data at very high throughput rates and with extremely low latency. Yet, FPGAs consume orders of magnitude less power than conventional systems. Thanks to their high configurability, they can be used as co-processors in heterogeneous multi-core architectures, and/or directly be placed in critical datapaths to reduce the load that hits the system CPU.

Current projects:

• Database operator acceleration / Hybrid databases

  • doppioDB -- Hybrid Database Engine

  • Centaur -- Hardware User-defined Function Framework

• Microservers / Smart Storage

  • Caribou -- Platform for Building Smart Storage

  • Consensus in a Box -- Distributed Consensus in Hardware

• Smarter Networks

• Machine learning on FPGAs
  

Past projects:

• IBEX -- Intelligent Storage Engine for Relational Databases

• Avalanche -- Data Processing on Bare Metal

Current project members:

• Gustavo Alonso (Professor)
• Amit Kulkarni (Postdoc)
• Zeke Wang (Postdoc)
• Abishek Ramdas (PhD student)
• Dario Korolija (PhD student)
• Fabio Maschi (PhD student)
• Kaan Kara (PhD student)
• Zhenhao He (PhD student)
• Monica Chiosa (Scientific Assistant)

Former members:

• Muhsen Owaida (Postdoc, now at SnowBell, Switzerland)
• David Sidler (PhD graduate, now at Microsoft, USA)
• René Müller (PhD graduate, now with FH Bern, Switzerland)
• Jens Teubner (Postdoc, now Professor at TU Dortmund, Germany)
• Louis Woods (PhD graduate, now with Apcera, USA)
• Zsolt Istvan (PhD graduate, now Assistant Professor at IMDEA, Spain)

Publications

(For complete list please see each individual project)

Conference papers

• Zsolt Istvan, David Sidler, Gustavo Alonso. Caribou: Intelligent Distributed Storage. 43rd International Conference on Very Large Databases (VLDB'17). Munich Germany, 28 August - 1 September.

• David Sidler, Zsolt Istvan, Muhsen Owaida, Gustavo Alonso. Accelerating Pattern Matching Queries in Hybrid CPU-FPGA Architectures. 2017 ACM SIGMOD/PODS Conference (SIGMOD'17), Chicago, US.

• Kaan Kara, Jana Giceva, Gustavo Alonso. FPGA-based Data Partitioning. 2017 ACM SIGMOD/PODS Conference (SIGMOD'17), Chicago, US.

• Muhsen Owaida, Hantian Zhang, Ce Zhang, Gustavo Alonso. Scalable Inference of Decision Tree Ensembles: Flexible Design for CPU-FPGA Platforms. 2017 27th International Conference on Field-Programmable Logic and Applications (FPL'17), Ghent, Belgium.

• Kaan Kara, Dan Alistarh, Gustavo Alonso, Onur Mutlu, Ce Zhang. FPGA-accelerated Dense Linear Machine Learning: A Precision-Convergence Trade-off. 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM'17), Napa, US.

• Muhsen Owaida, David Sidler, Kaan Kara, Gustavo Alonso.  Centaur: A Framework for Hybrid CPU-FPGA Databases. 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM'17), Napa, US.

• David Sidler, Zsolt Istvan, Gustavo Alonso. Low-Latency TCP/IP Stack for Data Center Applications. 23rd International Conference on Field Programmable Logic and Applications (FPL'16). Lausanne, Switzerland, 29 August - 2 September 2016.

• Kaan Kara, Gustavo Alonso. Fast and Robust Hashing for Database Operators. 23rd International Conference on Field Programmable Logic and Applications (FPL'16). Lausanne, Switzerland, 29 August - 2 September 2016.

• Zsolt Istvan, David Sidler, Gustavo Alonso. Runtime Parameterizable Regular Expression Operators for Databases. 23rd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). Washington DC, 1-3 May 2016.

• Zsolt Istvan, David Sidler, Gustavo Alonso, Marko Vukolic. Consensus in a Box: Inexpensive Coordination in Hardware. 13th USENIX Symposium on Networked Systems Design and Implementation (NSDI). Santa Clara, CA, 16-18 March 2016.

• David Sidler, Gustavo Alonso, Michaela Blott, Kimon Karras, Kees Vissers, Raymond Carley. Scalabe 10Gbps TCP/IP Stack Architecture for Reconfigurable Hardware. 23rd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). Vancouver, Canada, 2-6 May 2015.

• Louis Woods, Zsolt Istvan, Gustavo Alonso. Ibex -- An Intelligent Storage Engine with Support for Advanced SQL Off-loading. 40th Int'l Conference on Very Large Data Bases (VLDB). Hangzhou, China, 1-5 September 2014.

• Zsolt Istvan, Louis Woods, Gustavo Alonso. Histograms as a Side Effect of Data Movement for Big Data. 2014 ACM SIGMOD/PODS Conference (SIGMOD'14), Snowbird, Utah, US, 22-27 June 2014.

• Zsolt Istvan, Gustavo Alonso, Michaela Blott, Kees Vissers. A Flexible Hash Table Design For 10Gbps Key-value Stores on FPGAs. 23rd International Conference on Field Programmable Logic and Applications (FPL'13), Porto, Portugal, 2-4 September 2013.

• Louis Woods, Jens Teubner, and Gustavo Alonso. Parallel Computation of Skyline Queries. Proc. of the 21st IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2013), Seattle, WA, USA, April 2013. Best Paper Award.

• Jens Teubner, Louis Woods, and Chongling Nie.  Skeleton Automata for FPGAs: Reconfiguring without Reconstructing. Proc. of the ACM SIGMOD Conference on Management of Data (SIGMOD 2012), Scottsdale, AZ, USA, May 2012.

• Peter Fischer and Jens Teubner. MXQuery With Hardware Acceleration. Proc. of the 28th Int'l Conference on Data Engineering (ICDE), Demonstration, Arlington, VA, USA, April 2012.

• Louis Woods, Jens Teubner, and Gustavo Alonso. Complex Event Detection at Wire Speed with FPGAs. Proceedings of the VLDB Endowment/VLDB 2010, Singapore, September 2010.

• Jens Teubner, René Müller, and Gustavo Alonso. FPGA Acceleration for the Frequent Item Problem. Proc. of the 26th Int'l Conference on Data Engineering (ICDE), Long Beach, CA, USA, March 2010.

• René Müller, Jens Teubner, and Gustavo Alonso. Streams on Wires ― A Query Compiler for FPGAs. Proc. of the 35th Int'l Conference on Very Large Data Bases (VLDB)/Proc. of the VLDB Endowment, vol. 2, Lyon, France, August 2009.

• René Müller, Jens Teubner, and Gustavo Alonso. Data Processing on FPGAs. Proc. of the 35th Int'l Conference on Very Large Data Bases (VLDB)/Proc. of the VLDB Endowment, vol. 2, Lyon, France, August 2009.

Journal publications

• Zsolt Istvan, Gustavo Alonso, Michaela Blott, Kees Vissers. A Hash Table for Line Rate Data Processing. ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 8(13), April 2015.

• Louis Woods, Jens Teubner and Gustavo Alonso. Parallelizing Data Processing on FPGAs with Shifter Lists. ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 8(7), April 2015.

• Jens Teubner and Louis Woods. Data Processing on FPGAs. Synthesis Lectures on Data Management (Morgan & Claypool Publishers), June 2013, Vol. 5, No. 2, Pages 1-118.

• Jens Teubner, Louis Woods, and Chongling Nie. XLynx–An FPGA-based XML Filter. for Hybrid XQuery Processing. ACM Transactions on Database Systems (TODS), vol. 38(4), November 2013.

• René Müller, Jens Teubner, and Gustavo Alonso.  Sorting Networks on FPGAs. The VLDB Journal (VLDBJ), vol. 23(2), February 2012.

Demos, Tutorials and Workshops

• David Sidler, Muhsen Owaida, Zsolt Istvan, Kaan Kara and Gustavo Alonso. doppioDB: A Hardware Accelerated Database. Proc. of the 27th Int'l Conference on Field Programmable Logic and Applications (FPL), Demonstration Track, Ghent, Belgium, September 2017.
• David Sidler, Zsolt Istvan, Muhsen Owaida, Kaan Kara and Gustavo Alonso. doppioDB: A Hardware Accelerated Database. 2017 ACM SIGMOD/PODS Conference (SIGMOD'17), Chicago, US.
• Zsolt Istvan, David Sidler and Gustavo Alonso. Building a Distributed Key-Value Store with FPGA-based Microservers. Proc. of the 25th Int'l Conference on Field Programmable Logic and Applications (FPL), Demonstration Track, London, UK, September 2015.

• Louis Woods, Zsolt Istvan, and Gustavo Alonso. Hybrid FPGA-accelerated SQL Query Processing. Proc. of the 23rd Int'l Conference on Field Programmable Logic and Applications (FPL), Demonstration Track, Porto, Portugal, September 2013.

• Louis Woods, Jens Teubner, and Gustavo Alonso. Less Watts, More Performance: An Intelligent Storage Engine for Data Appliances. Proc. of the ACM SIGMOD Conference on Management of Data (SIGMOD 2013), Demonstration Track, New York, NY, USA, June 2013

• Michaela Blott, Kimon Karras, Ling Liu, Kees Vissers, Zsolt Istvan, Jeremia Bar. Achieving 10Gbps Line-rate Key-value Stores with FPGAs. 5th USENIX Workshop on Hot Topics in Cloud Computing (HotCloud'13), San Jose, CA, 25-26 June 2013

• Louis Woods, Jens Teubner, and Gustavo Alonso. Real-Time Pattern Matching with FPGAs. Proc. of the 27th Int'l Conference on Data Engineering (ICDE), Demonstration, Hannover, Germany, April 2011.

• Jens Teubner and Louis Woods. Snowfall: Hardware Stream Analysis Made Easy. GI-Fachtagung für Business, Technologie und Web (BTW), Demonstration, Kaiserslautern, Germany, March 2011.

• Jens Teubner, René Müller, and Gustavo Alonso. Frequent Item Computation on a Chip. Transactions on Knowledge and Data Engineering (TKDE), vol. 23(8), August 2011.

• René Müller, Jens Teubner, and Gustavo Alonso. Glacier: A Query-to-Hardware Compiler. Proc. of the ACM SIGMOD Conference on Management of Data (SIGMOD 2010), Demonstration, Indianapolis, IN, USA, June 2010.

• René Müller and Jens Teubner. FPGAs: A New Point in the Database Design Space. Proc. of the 13th Int'l Conference on Extending Database Technology (EDBT), Tutorial, Lausanne, Switzerland, March 2010.

• René Müller and Jens Teubner. FPGA: What's in it for a Database? Proc. of the ACM SIGMOD Conference on Management of Data (SIGMOD 2009), Tutorial, Providence, RI, USA, June 2009.

Acknowledgements

Our FPGA work is funded in part by grants from Xilinx, as part of the Enterprise Computing Center (www.ecc.ethz.ch), and Microsoft Research, as part of the Joint Research Center MSR-ETHZ-EPFL. We use FPGA equipment generously donated by Xilinx, by Intel through the Intel Altera Heterogeneous Research Platform, and acquired under the Maxeler University Program.